Nand flash controller on TC6393XB
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NAND Flash Host Controller Configuration register (0x100 base)

Offset  size  desc.
0x00:     2   reserved 1
0x02:     2   reserved 2
0x06:     2   reserved 3
0x08:     1   reserved 4
0x09:     3   reserved 5
0x0e:     1   reserved 6
0x2c:     2   reserved 7
0x2e:     2   reserved 8
0x34:     1   reserved 9
0x3c:     1   reserved 10
0x49:     1   reserved 11
0x80:     1   reserved 
0x81:     1   reserved 
0x82:     2   reserved 
0x84:     2   reserved 
0x86:     1   reserved 
0x87:     1   reserved 
0xfc:     1   reserved 
0xff:     1   reserved 

0x04:     2   Command Register
   0: unknown
   1: SMCREN (enable power?)
        1: enable
        0: disable
0x10:     4   Nand flash control reg base address (0xb00 typ.)
0x3d:     1   Interrupt pin
0x48:     1   Interrupt enable
0x4a:     1   Event Control
0x4c:     1   Internal Clock Control
   7: SCRUNEN (clock enable)
        0: disable
        1: enable
0x5b:     1   ECC control
0x60:     1   NAND Flash Transaction Control
0x61:     1   NAND Flash Monitor
0x62:     1   NAND Flash Power Supply Control
0x63:     1   Nand Flash Detect Control

NAND Flash Control Register (pointed to by 0x110) (typ. 0xb00)

0x00: RW  4   Data Register      
0x04: RW  1   Mode Register (W(R/W))
 3-2:  PCNT[1:0]
0x05: R   1   Status Register
0x06: R   1   Interrupt Status Register
   0:  RDYREQ (write to clear)
0x07: RW  1   Interrupt Mask Register
   0:  MRDYREQ (mask) (set to mask)
   7:  INTEN  (master interrupt enable for NAND)

To initialise the controller:
Set SMCREN (d1) of the command register (0x04)
Set base address in 0x10 to point to the NAND Flash Control Register (typ 0xb00)
Set SCRUNEN (d7) in Internal Clock Control (0x4c)

NAND Flash Power control:
Documentation is wooly - it says set PCNT (which is two bits not one).

Interrupts are generated when the NAND controller SMRB (busy) signal transitions from low to high.

Pin descriptions:
SMD7 / AGPIO15  P4    Nand flash data   Bit 7
SMD6 / AGPIO14  P5    Nand flash data
SMD5 / AGPIO13  P6    Nand flash data
SMD4 / AGPIO12  P7    Nand flash data
SMD3 / AGPIO11  P8    Nand flash data
SMD2 / AGPIO10  P9    Nand flash data
SMD1 / AGPIO9   N9    Nand flash data
SMD0 / AGPIO8   N10   Nand flash data   Bit 0
SMCLE           N3    Command Latch Enabled
SMALE           N4    Address Latch Enabled
SMWE            N5    Write Enabled
SMRE            N6    Read Enabled
SMCE            N7    Chip Enabled
SMWP            N8    Write Protection
SMRB            M10   Busy