Memory an IO control regs for e740:
Pxa manual 522 section 6-9

0x4800 0000   MDCNFG    0x090009C9				0x000009c9
	*SDRAM timing:
		pair 0/2: tRP=2, CL=2, tRCD=2, tRAS=5, tRC=8
	*DNB0 = 1 - 4 banks
	*DRAC0 = %10 - 13 row address bits
	*DCAC0 = %01 - 9 col address bits
	*DE0 = 1  (lower partition enabled)
	*DE1 = 0  (upper partition disabled)
	*DWID = 0 (32 bits)
	*DADDR0 = 0 (normal addressing)
	*DLATCH0 = 1 (latch on return clock)
	*DSA1111_0 = 0 (disable)
0x4800 0004   MDREFR	0x0095C017
	* K2FREE = 0
	* K1FREE = 0
	* K0FREE = 1
	* SLFRSH = 0 (no self refresh)
	* APD = 1 (allow auto power down)
	* K2DB2 = 0 K2RUN = 1
	* K1DB2 = 0 K1RUN = 1
	* EP1PIN = 1 (enable SDRAM clock pin 1)
	* EP0PIN = 0
	* K0DB2 = 0 (SDCLK0 = 1/2 MEMCLK)
	* K0RUN = 0 (disabked)
	* DR1 = 0x017
0x4800 0008   MSC0	0x299CA2D2
0x4800 000c   MSC1	0x124C2989
0x4800 0010   MSC2	0x29840ABC
0x4800 0014   MECR	0x3
0x4800 0018             0x0
0x4800 001c   SXCNFG    0x0
0x4800 0020             0x01FE01FE
0x4800 0024   SXMRS     0x0
0x4800 0028   MCMEM0	0x00020418
0x4800 002c   MCMEM1	0x0002449D
0x4800 0030   MCATT0	0x0002449D
0x4800 0034   MCATT1	0x0002449D
0x4800 0038   MCIO0	0x00014290
0x4800 003c   MCIO1	0x00014290
0x4800 0040   MDMR5     0x00220022				0x00000022
0x4800 0044             0x8